SK hynix has unveiled a next-generation technology roadmap to redesign the entire memory hierarchy in order to resolve power and performance bottlenecks in the rapidly growing artificial intelligence (AI) inference market.

At his keynote speech at “SEDEX 2026,” Ahn Hyun, President and Chief Development Officer (CDO) of SK hynix, assessed that new bottlenecks are emerging within the existing memory architecture as demand for AI inference surges. He stressed that, in addition to continuously strengthening high bandwidth memory (HBM) capabilities, it is essential to introduce new memory tiers such as 3D stacked DRAM and high bandwidth flash (HBF) to optimize compute efficiency and energy consumption across AI infrastructure as a whole.

Ahn noted that major global technology companies are aggressively ramping up infrastructure investments in light of explosive AI demand. He explained that the AI inference market is expanding in a multiplicative way, with task complexity, context length, and the number of requests all rising simultaneously. As a result, he projected that the scale of AI infrastructure in 2030 will expand to roughly 20 times the 2026 level.

In this expansion process, not only compute throughput but also the volume of model weights and intermediate data to be processed is increasing explosively. In particular, the key-value (KV) cache, which stores and reuses previous token information, requires exponentially more storage space as context length grows. To operate large-capacity KV cache data, it is necessary to distribute data across multiple tiers such as HBM, DRAM, and solid state drives (SSDs). In this process, however, latency and power consumption caused by data movement between tiers are becoming more severe.

Ahn analyzed that whereas memory bottlenecks in the past mainly occurred between compute units and memory, going forward the data movement process between different memory tiers itself is emerging as a new bottleneck. Accordingly, he explained, integrated optimization at the level of the entire memory ecosystem is essential, going beyond performance improvements in individual semiconductor components.

In response, SK hynix will significantly diversify its next-generation memory portfolio. The strategy is to sequentially build new tiers that bridge the gaps between SRAM and HBM, between HBM and DRAM, and between DRAM and SSDs.

First, the company will advance its core HBM product lineup from HBM1 through HBM4E while expanding into customized “custom HBM.” Custom HBM integrates the memory controller and tailored logic directly into the base die at the bottom, enabling functions optimized to each customer’s AI system architecture.

As a solution to narrow the performance gap between SRAM and HBM, the company proposed “3D stacked DRAM.” This approach vertically stacks DRAM directly on top of compute semiconductors such as graphics processing units (GPUs) or neural processing units (NPUs), thereby drastically shortening the physical distance. This improves data supply speed while reducing power consumption.

In addition, to address surging capacity requirements, SK hynix unveiled its NAND flash-based “HBF” technology. HBF is a memory product that transplants through-silicon via (TSV) stacking and high-speed I/O technologies, originally used in HBM manufacturing, into NAND. Positioned between HBM and DRAM in the hierarchy, it is being developed to offer roughly half the bandwidth of same-generation HBM while increasing storage capacity by about tenfold. Given that AI inference workloads involve frequent data reads and relatively few writes, NAND-based HBF can be the optimal alternative, the company explained. Compute Express Link (CXL) and “Storage-Next” next-generation storage technologies also form key pillars of this diversification strategy.

SK hynix plans to pursue proactive international standardization of HBF technology and expand collaboration with global consortiums to establish a new memory standard ecosystem at an early stage.

Separately, SK hynix is participating in “SEDEX 2026,” hosted by the Korea Semiconductor Industry Association, where it is showcasing a broad range of products spanning from AI infrastructure to on-device equipment. Under the theme “The Unstoppable Journey of AI,” the company created a large exhibition booth in the shape of an athletics track, and displayed an NVIDIA Vera Rubin Superchip and an HBM wafer bearing the signature of CEO Jensen Huang to highlight the solid partnership between the two companies.

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