Chinese DRAM company ChangXin Memory Technologies (CXMT) has announced plans to launch next-generation server DRAM applying the new “4F² (four-F-square)” technology within this year, raising concerns over technological catch-up. In response, Samsung Electronics on the 14th reiterated that it is also developing this technology. Samsung Electronics and SK hynix also unveiled next-generation technologies including samples of 7th-generation High Bandwidth Memory (HBM), branded HBM4E, highlighting their “technological superiority” in the memory sector.

Jae-hyeok Song, President and Chief Technology Officer (CTO) of Samsung Electronics, responded “Yes” when asked at the 28th Semiconductor Exhibition (SEDEX 2026), held on the 14th at COEX in Gangnam-gu, Seoul, whether Samsung Electronics is also developing 4F² technology. When asked if preparations were going well, he said, “We are working hard.” 4F² is a technology that reduces the cell area, the minimum unit for storing data in DRAM. Compared with the existing 6F² structure, it can further shrink cell area, enabling more cells to be placed in the same area and thereby increasing storage density. In February this year, Samsung Electronics presented a paper at the International Solid-State Circuits Conference (ISSCC) reporting that it had fabricated a 16Gb DRAM test chip using a 4F² structure and successfully operated it.

Hyeon Ahn, Head of Development at SK hynix, forecast in his keynote speech that the performance scale of artificial intelligence (AI) infrastructure will grow to about 20 times the current level by 2030. He said, “Not only AI computation volume, but also demand for storing and moving model weights and intermediate data is increasing together.” He explained that as AI performs more complex tasks, the memory required also increases.

Ahn said, “Data must be distributed and stored across the memory hierarchy, including HBM, DRAM, and SSDs, and in this process new bottlenecks are emerging in performance and power consumption.” As solutions, he proposed “3D stacked DRAM”, which stacks DRAM on top of compute chips to shorten data movement distance, and High Bandwidth Flash (HBF). “We are also working on HBF standardization with companies such as SanDisk,” he said, adding, “The official standard specification will be released in January next year.”

Samsung Electronics, which set up a booth at SEDEX 2026, also exhibited models of “zHBM” and “zNAND-O”, first unveiled in the United States in August this year. zHBM is a technology that stacks HBM on top of AI compute chips, rather than placing it beside them, to reduce data movement distance. zNAND-O stacks multiple layers of NAND flash chips and is designed to quickly retrieve data needed to run AI on devices such as smartphones.

SK hynix showcased structural models of HBM and HBF. HBF is a memory that applies HBM’s chip stacking and high-speed data transmission technologies to NAND flash. The development target is to achieve data transfer bandwidth at about half the level of HBM of the same generation, while providing roughly 10 times the capacity.

The two companies also presented samples of HBM4E, the 7th generation of HBM. Samsung Electronics shipped 12-high stack samples to customers in May this year, while SK hynix has completed sample supply and is developing the product with the goal of full-scale mass production next year.

Meanwhile, regarding China’s semiconductor push, Elon Musk, Chief Executive Officer (CEO) of Tesla, wrote on social media platform X that “it will not be easy to develop a stacked structure that can maintain the temperature of logic semiconductors,” predicting that China would find it difficult to catch up in HBM. However, he expressed dissatisfaction with memory semiconductor prices. “Micron’s future memory prices were reasonable,” he said, “while other companies were outrageously expensive.” Although he did not name Samsung Electronics or SK hynix directly, he warned, “Today’s customers will not forget this.”

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