The Artificial Intelligence Semiconductor Future Technology Conference 2025 (AISFC 2025), hosted by the Ministry of Science and ICT, was held on the 10th at the Crystal Ballroom of Lotte Hotel Seoul. Since 2020, AISFC has been organized under the theme of AI semiconductor technology trends and ecosystem activation, bringing together domestic AI semiconductor technology companies and academic experts to discuss key issues and network. In particular, this year’s event laid the groundwork for Korea’s entry into the ranks of the world’s top three AI powers, with the official launch of the K-Perf (Korea Performance) consortium, a joint performance benchmark that can distinctively evaluate domestic AI semiconductor performance, and the announcement of the 2026 AI semiconductor support roadmap.

“Korea to triple AI support with goal of becoming a top-three AI power”


Baek Kyung-hoon, Minister of Science and ICT, stated, “During my term, I will devise measures to build an independent AI foundation model, and to elevate AI and quantum technologies as well as neural processing units (NPUs) to world-class levels. The performance of domestic AI semiconductors has now entered a mature phase, and the K-Perf declaration ceremony will mark the beginning of this,” adding, “For Korea to become one of the world’s top three AI powers, Korean scientists need AI that they can use like colleagues, and the government will work to establish foundation models and services in specialized fields.”


He continued, “If 2025 was the year that laid the foundation for becoming a top-three AI power, I believe 2026 will be the point at which we genuinely move toward becoming an AI powerhouse and hub of the Asia-Pacific region. The government has allocated a research and development budget of KRW 35 trillion for 2026, of which AI investment will be KRW 9.9 trillion, three times the existing level,” and added, “Just as Google’s TPU has demonstrated its potential through efficiency comparable to NVIDIA’s GPUs, our government will also support the growth of the AI ecosystem through continued investment. Using this event as a springboard, we will support companies and researchers in achieving optimal results and will actively support domestic AI semiconductors so that they can become the main driver of a second K-semiconductor success story.”

K-Perf, a joint performance benchmark by suppliers and users, officially launched


One of the core themes of AISFC 2025 was the launch of “K-Perf,” a benchmark designed to distinctively assess AI semiconductor performance. MLPerf, the semiconductor evaluation standard currently widely used in the industry, has standardized workloads and verification procedures, but there is criticism that it diverges from actual usage performance. Its focus on training rather than inference is also seen as a limitation. In response, the government has begun establishing a joint evaluation framework in which AI semiconductor suppliers and cloud and AI user companies collaborate.

On the supplier side, K-Perf includes FuriosaAI, Rebellions, and HyperAccel. On the user side, participants include Naver Cloud, KT Cloud, NHN Cloud, Samsung SDS, LG CNS, SK Telecom, LG AI Research, Kakao Enterprise, and Moreh.


The main test items use Meta Llama 3.1 8B and 405B, Meta Llama 3.3 70B, and EXAONE 4.0 32B, with the possibility of adding Upstage’s WBL in the future. Test items are divided into: ▲ input-output variable range tests using the four language models, covering input and output lengths, number of concurrent users, and precision tests; and ▲ measurement of output latency and tokens processed per second at the input processing stage, tokens generated per second during answer generation, and power consumption. Results are generated as an Excel-based measurement sheet and a two-dimensional graph.

Oh Yoon-je, Semiconductor & Quantum PM at IITP, said, “There has been a large gap between suppliers and users in terms of performance verification. K-Perf is the starting point for resolving this as an evaluation tool for domestic AI semiconductors. We plan to establish certification and verification procedures in the first quarter, and will later expand into on-device AI as well.”

AI semiconductor companies participating in K-Perf outline their 2026 targets


In Session 3, domestic AI semiconductor companies and support organizations made presentations. Under the theme “Advancing Next-Generation AI Semiconductor Design,” the session included: ▲ “From chip to market: optimizing AI inference with RNGD” by FuriosaAI CTO Kim Han-joon; ▲ “A new era of efficiently operated frontier LLM-AI infrastructure” by Rebellions CTO Oh Jin-wook; ▲ “LPU semiconductors for sustainable AI infrastructure and LLM services” by HyperAccel CTO Lee Jin-won; and ▲ “Leap into the era of on-device AI semiconductors and physical AI” by DEEPX Vice President Kim Jung-wook.


FuriosaAI will begin commercializing its second-generation neural processing unit (NPU), RNGD, in January next year and will launch the upgraded RNGD+ with HBM3e 72GB in September. In December next year, it will release RNGD+ Max, a model combining two RNGD chips with HBM3e 144GB. A server model linking eight RNGD cards will be introduced to the market in March 2026, and a second-generation RNGD server will be released in 2027. The SDK, its software support for RNGD utilization, will be updated to version 4.0 within this month.

SDK version 4.0 includes “hybrid batching,” which efficiently groups different types of AI inference requests to increase NPU utilization and throughput; pooled modeling, which keeps model weights pre-loaded in memory for immediate reuse to reduce first-request loading latency; expanded support for NPU operators that can run directly on the NPU; a function that allows Kubernetes to dynamically allocate additional CPU and memory resources needed while RNGD workloads are running; and an NPU backend for torch.compile(), which is used to automatically optimize and compile PyTorch models.

In simpler terms, SDK 4.0 is a version that further strengthens inference performance optimization, improves the efficiency of AI model memory usage and management, and enhances infrastructure integration centered on NPUs and Kubernetes.


While AI semiconductor presentations were underway, attention was also drawn to the exhibition hall set up outside the main venue. The exhibition booths were organized into: △ design R&D △ design △ design & pilot production △ pilot production △ verification △ demonstration △ commercialization. A total of 18 companies, universities, and institutions participated. Minister Baek Kyung-hoon visited the booths of major AI semiconductor companies such as FuriosaAI, Rebellions, HyperAccel, DEEPX, and Mobilint to receive briefings on key product specifications and commercialization status.


FuriosaAI demonstrated running OpenAI’s large open-weight language model gpt-oss-120B on two RNGD cards. The gpt-oss-120B model requires at least 60GB of memory and is configured as a Mixture-of-Experts (MoE) model with 120 billion parameters and 128 experts. To deploy this model in an ultra-low-latency environment at around 10ms, it typically requires either a multi-GPU configuration of NVIDIA H100 or chips such as Blackwell B100, which significantly improve MoE model efficiency.

To minimize latency, FuriosaAI actively leveraged the MoE characteristic of selectively computing only those weights that are activated through expert routing. It also optimized its Tensor Compression Processor (TCP) to directly compute the MXFP4 (4-bit mixed-precision quantization) format supported by gpt-oss-120B, thereby reducing memory bandwidth usage and significantly improving computational efficiency. These two optimizations enabled ultra-low-latency response times of approximately 5.8 ms after query input.

What do IITP and NIPA say about the direction of “2026 domestic AI semiconductor support programs”?


The fourth session featured presentations by the Institute for Information & Communications Technology Planning & Evaluation (IITP) on ▲ 2026 AI semiconductor R&D program implementation plans and ▲ performance and plans for commercialization support, including AI semiconductor demonstrations. IITP is a dedicated agency under the Ministry of Science and ICT responsible for planning, managing, and evaluating national R&D in the ICT sector, playing a central role in technology commercialization and nurturing specialized talent. Together with the Telecommunications Technology Association (TTA) and the National IT Industry Promotion Agency (NIPA), it is one of the organizations supporting K-Perf testing and certification, R&D, and demonstration commercialization.


Kang Ho-seok, Team Leader at IITP, said, “The 2025 support programs focused on scaling up NPU companies via K-Cloud and related initiatives. There is also a preliminary feasibility project related to physical AI to support on-device AI, and processing-in-memory (PIM) semiconductors have been designated and supported as a new project since 2021,” adding, “The 2025 semiconductor performance standards were defined as the ability to run 20B models on on-device AI; for neuromorphic semiconductors, performance was set at 1 POPS (1,000 trillion operations per second); and for hybrid computing, we supported DNN-SNN (deep neural network–spiking neural network) hybrid architectures. We are also promoting ultra-large AI models via K-Cloud and optical communication-based interfaces.”


He continued, “There will be a total of 12 projects in 2026, many of which are at the preliminary feasibility study stage. The main focus for 2026 is on LPDDR6-PIM-based AI accelerators and controller development projects utilizing them. This also includes hardware development and software framework development. In addition, to bridge the gap between semiconductor suppliers and users, we are considering directions such as optimizing inter-chip communication libraries for AI semiconductors on the system software side, similar to NVIDIA’s NVLink.” He added, “For PIM, we are verifying compute support based on INT8 (8-bit integer), and for lightweight AI frameworks, we are working based on BF16 (16-bit floating point).”

Furthermore, although NPU companies are working to support open-source frameworks such as vLLM and PyTorch, these efforts have not yet led to actual adoption on the user side. To address this, a competitive R&D program will be promoted to strengthen compatibility support. Competitive projects will be evaluated on whether Meta Llama 8B runs well on a single server, and low-level APIs that leverage each NPU hardware will be requested. The intention to request low-level APIs reflects a desire to assess the system-level foundation and maturity needed to maximize hardware accelerator performance for AI inference workloads.


NIPA has, through the first supplementary budget program this year, worked on upgrading AI demonstration infrastructure with 50 TFLOPS (1,000 trillion floating-point operations per second), applying NPUs to domestic devices and building AI demonstration services, and supporting overseas on-site demonstrations. Through the second supplementary budget, it has also secured compatibility between the latest AI models and domestic NPUs and provided IP support for semiconductor design. As a result, 27 NPUs have been developed and advanced by 16 semiconductor companies.

Jo Jae-hong, Team Leader at the National IT Industry Promotion Agency (NIPA), said, “NIPA supports the entire AI semiconductor production process, from R&D and design software to prototype verification and mass production. In 2025, with the first and second supplementary budgets, we established a diffusion system for semiconductors. As a result, 27 domestic AI semiconductors have entered the market and 16 fabless companies are receiving support. Exports exceeding USD 5 million have been achieved this year, and we are also supporting exports by linking domestic AI companies with AI semiconductor firms.” Next year’s projects will focus on discovering product demand based on products completed this year and providing institutional improvement, employment linkage, and overseas expansion support.

Remarkable achievements in 2025 AI semiconductor initiatives, real beginning comes in 2026

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